SOI at IBM: Current status of technology, modeling, design, and the outlook for the 0.1 μm generation
- F. Assaderaghi
- G. Shahidi
- 2000
- IEEE International SOI Conference 2000
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31 results for F. Assaderaghi
Silicon-on-insulator dynamic threshold ESD networks and active clamp circuitry
- S. Voldman
- D. Hui
- et al.
- 2000
- EOS/ESD 2000
Design of a high performance PD SOI for the 0.18 μm technology generation
- M. Sherony
- S.-H. Lo
- et al.
- 2000
- ICM 2000
Partially depleted silicon-on-insulator (SOI): A device design/modeling and circuit perspective
- F. Assaderaghi
- G. Shahidi
- et al.
- 2000
- ICM 2000
DTMOS: Its derivatives and variations, and their potential applications
- F. Assaderaghi
- 2000
- ICM 2000
Partially-depleted SOI compact model - formulation and parameter extraction
- S.K.H. Fung
- L. Wagner
- et al.
- 2000
- VLSI Technology 2000
0.22 μm CMOS-SOI technology with a Cu BEOL
- A. Ajmera
- J. Sleight
- et al.
- 1999
- VLSI Technology 1999
Electrostatic discharge (ESD) protection in silicon-on-insulator (SOI) CMOS technology with aluminum and copper interconnects in advanced microprocessor semiconductor chips
- S. Voldman
- D. Hui
- et al.
- 1999
- EOS/ESD 1999
A body-contact SOI MOSFET model for circuit simulation
- P. Su
- S.K.H. Fung
- et al.
- 1999
- IEEE International SOI Conference 1999
Electrostatic discharge protection in silicon-on-insulator technology
- S. Voldman
- D. Hui
- et al.
- 1999
- IEEE International SOI Conference 1999