Understanding and minimizing ground bounce during mode transition of power gating structures
- S. Kim
- S.V. Kosonocky
- et al.
- 2003
- ISLPED 2003
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31 results for Stephen Kosonocky
Application of an SOI 0.12-μm CMOS technology to SoCs with low-power and high-frequency circuits
- Jean-Olivier Plouchart
- Noah Zamdmer
- et al.
- 2003
- IBM J. Res. Dev
Low-power circuits and technology for wireless digital systems
- Stephen V. Kosonocky
- Azeez J. Bhavnagarwala
- et al.
- 2003
- IBM J. Res. Dev
Long-term power minimization of dual-νΤ CMOS circuits
- Suhwan Kim
- Youngsoo Shin
- et al.
- 2002
- ASIC/SOC 2002
Low power integrated scan-retention mechanism
- Victor Zyuban
- Stephen V. Kosonocky
- 2002
- LPED 2002
Supply voltage strategies for minimizing the power of CMOS processors
- Jin Cai
- Yuan Taur
- et al.
- 2002
- VLSI Technology 2002
Interconnect-centric array architectures for minimum SRAM access time
- A.J. Bhavnagarwala
- S.V. Kosonocky
- et al.
- 2001
- ICCD 2001
Enhanced multi-threshold (MTCMOS) circuits using variable well bias
- S.V. Kosonocky
- M.J. Immediato
- et al.
- 2001
- ISLPED 2001
Mixed multi-threshold differential cascode voltage switch (MT-DCVS) circuit styles and strategies for low power VLSI design
- W. Chen
- W. Hwang
- et al.
- 2001
- ISLPED 2001
Eight-issue tree-VLIW processor for dynamic binary translation
- Kemal Ebcioglu
- Jason Fritts
- et al.
- 1998
- ICCD 1998