Dielectric isolated FinFETs on bulk substrate
- Darsen Lu
- Kangguo Cheng
- et al.
- 2014
- S3S 2014
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62 results for Dechao Guo
SOI FinFET versus bulk FinFET for 10nm and below
- Terence B. Hook
- F. Allibert
- et al.
- 2014
- S3S 2014
10nm FINFET technology for low power and high performance applications
- D. Guo
- H. Shang
- et al.
- 2014
- ICSICT 2014
Aggressively scaled strained silicon directly on insulator (SSDOI) FinFETs
- A. Khakifirooz
- R. Sreenivasan
- et al.
- 2013
- S3S 2013
Critical analysis of 14nm device options
- Phil Oldiges
- R. Muralidhar
- et al.
- 2011
- SISPAD 2011
High performance 32nm SOI CMOS with high-k/metal gate and 0.149μm 2 SRAM and ultra low-k back end with eleven levels of copper
- B. Greene
- Q. Liang
- et al.
- 2009
- VLSI Technology 2009
Next-Generation Logic Design Architecture for Vertical-Transport Nanosheets
- Biswanath (Biswa) Senapati
- Jeongho Do
- et al.
- 2023
- SPIE Advanced Lithography + Patterning 2023
Yield learning methodologies and failure isolation in ring oscillator circuit for CMOS technology research
- Victor Chan
- Kangguo Cheng
- et al.
- 2019
- IEEE Trans Semicond Manuf
CMP Challenges for Advanced Technology Nodes
- John H Zhang
- Haigou Huang
- et al.
- 2017
- MRS Advances
Understanding short channel mobility degradation by accurate external resistance decomposition and intrinsic mobility extraction
- Tao Chu
- Reinaldo A. Vega
- et al.
- 2015
- Journal of Applied Physics