On-chip timing uncertainty measurements on IBM microprocessors
- R.L. Franch
- P. Restle
- et al.
- 2008
- IEEE ITC 2008
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66 results for Phillip Restle
Comparison of split- versus connected-core supplies in the POWER6™ microprocessor
- Norman James
- Phillip Restle
- et al.
- 2007
- ISSCC 2007
IBM POWER6 microprocessor physical design and design methodology
- Rex Berridge
- Robert M. Averill III
- et al.
- 2007
- IBM J. Res. Dev
Distributed differential oscillators for global clock networks
- Steven C. Chan
- Kenneth L. Shepard
- et al.
- 2006
- IEEE Journal of Solid-State Circuits
Characterization of the impact of interconnect design on the capacitive load driven by a global clock distribution
- G.G. Lopez
- G. Fiorenza
- et al.
- 2005
- GLSVLSI 2005
New prospects for clocking synchronous and quasi-asynchronous systems
- Phillip Restle
- Ken Shepard
- 2005
- ASYNC 2005
Uniform-phase uniform-amplitude resonant-load global clock distributions
- Steven C. Chan
- Kenneth L. Shepard
- et al.
- 2005
- IEEE Journal of Solid-State Circuits
Design and implementation of the POWER5™ microprocessor
- Joachim Clabes
- Joshua Friedrich
- et al.
- 2004
- DAC 2004
Design and implementation of the POWER5™ microprocessor
- Joachim Clabes
- Joshua Friedrich
- et al.
- 2004
- ICICDT 2004
Design and implementation of the POWERS™ microprocessor
- Joachim Clabes
- Joshua Friedrich
- et al.
- 2003
- ISSCC 2003