Circuit and physical design of the zenterprise™ ec12 microprocessor chips and multi-chip module
- James Warnock
- Yuen Chan
- et al.
- 2014
- IEEE Journal of Solid-State Circuits
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30 results for H. Smith
A thermal simulation process based on electrical modeling for complex interconnect, packaging, and 3DI structures
- Lijun Jiang
- Chuan Xu
- et al.
- 2010
- IEEE Transactions on Advanced Packaging
IBM POWER6 microprocessor physical design and design methodology
- Rex Berridge
- Robert M. Averill III
- et al.
- 2007
- IBM J. Res. Dev
New methodology for combined simulation of delta-I noise interaction with interconnect noise for wide, on-chip data-buses using lossy transmission-line power-blocks
- Alina Deutsch
- Howard H. Smith
- et al.
- 2006
- IEEE Transactions on Advanced Packaging
A CAD methodology and tool for the characterization of wide on-chip buses
- I.M. Elfadel
- Alina Deutsch
- et al.
- 2005
- IEEE Transactions on Advanced Packaging
A multiconductor transmission line methodology for global on-chip interconnect modeling and analysis
- I.M. Abe Elfadel
- Alina Deutsch
- et al.
- 2004
- IEEE Transactions on Advanced Packaging
A comprehensive 2-D inductance modeling approach for VLSI interconnects: Frequency-dependent extraction and compact circuit model synthesis
- Gerard V. Kopcsay
- Byron Krauter
- et al.
- 2002
- IEEE Transactions on VLSI Systems
IBM eServer z900 high-frequency microprocessor technology, circuits, and design methodology
- Brian W. Curran
- Yuen H. Chan
- et al.
- 2002
- IBM J. Res. Dev
On-chip wiring design challenges for gigahertz operation operation
- Alina Deutsch
- Paul W. Coteus
- et al.
- 2001
- Proceedings of the IEEE
When are transmission-line effects important for on-chip interconnections?
- Alina Deutsch
- Gerard V. Kopcsay
- et al.
- 1997
- IEEE T-MTT