Vertical channel devices enabled by through silicon via (TSV) technologies
- C. Kothandaraman
- Sami Rosenblatt
- et al.
- 2016
- IEDM 2016
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12 results for J. Safran
3Di DC-DC Buck Micro Converter with TSVs, Grind Side Inductors, and Deep Trench Decoupling Capacitors in 32nm SOI CMOS
- J. Safran
- Giri N. K. Rangan
- et al.
- 2016
- ECTC 2016
3D copper TSV integration, testing and reliability
- Mukta Farooq
- T. Graves-Abe
- et al.
- 2011
- IEDM 2011
Highly Manufacturable 40-50 GHz VCOs in a 120nm System-on-Chip SOI Technology
- Jonghae Kim
- Jean-Olivier Plouchart
- et al.
- 2003
- IEDM 2003
Impact of 3D copper TSV integration on 32SOI FEOL and BEOL reliability
- Mukta Farooq
- Giuseppe La Rosa
- et al.
- 2015
- IRPS 2015
Copper through silicon via (TSV) for 3D integration
- C. Kothandaraman
- B. Himmel
- et al.
- 2012
- IRPS 2012
Embedded memory considerations in SOI
- G. Wang
- Carl Radens
- et al.
- 2010
- IEEE International SOI Conference 2010
A compact eFUSE programmable array memory for SOI CMOS
- John Safran
- Alan Leslie
- et al.
- 2007
- VLSI Circuits 2007
Reliability investigation of NiPtSi electrical fuse with different programming mechanisms
- C. Tian
- D. Moy
- et al.
- 2007
- IIRW 2007
Electrically Programmable Fuse (eFUSE): From Memory Redundancy to Autonomic Chips
- Norm Robson
- John Safran
- et al.
- 2007
- CICC 2007