GaN Devices on a 200 mm Si Platform Targeting Heterogeneous Integration
- Ko-Tao Lee
- Can Bayram
- et al.
- 2017
- IEEE Electron Device Letters
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28 results for Edmund Sprogis
3D copper TSV integration, testing and reliability
- Mukta Farooq
- T. Graves-Abe
- et al.
- 2011
- IEDM 2011
Three-dimensional chip stack with integrated decoupling capacitors and thru-si via interconnects
- Bing Dang
- Michael Shapiro
- et al.
- 2010
- IEEE Electron Device Letters
Die-to-wafer 3D integration technology for high yield and throughput
- Katsuyuki Sakuma
- Paul S. Andry
- et al.
- 2008
- MRS Fall Meeting 2008
Reliable through silicon vias for 3D silicon applications
- M.J. Shapiro
- M. Interrante
- et al.
- 2009
- IITC 2009
Characterization of stacked die using die-to-wafer integration for high yield and throughput
- K. Sakuma
- P. Andry
- et al.
- 2008
- ECTC 2008
Reliability testing of through-silicon vias for high-current 3D applications
- Steven L. Wright
- Paul S. Andry
- et al.
- 2008
- ECTC 2008
3D silicon integration
- J. Knickerbocker
- P. Andry
- et al.
- 2008
- ECTC 2008
3D chip-stacking technology with through-silicon vias and low-volume lead free interconnections
- Katsuyuki Sakuma
- Paul S. Andry
- et al.
- 2008
- IBM J. Res. Dev
Fabrication and characterization of robust through-silicon vias for silicon-carrier applications
- Paul S. Andry
- Cornelia K. Tsang
- et al.
- 2008
- IBM J. Res. Dev