Gate-all-around silicon nanowire 25-stage CMOS ring oscillators with diameter down to 3 nm
- Sarunya Bangsaruntip
- A. Majumdar
- et al.
- 2010
- VLSI Technology 2010
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51 results for Jeffrey W. Sleight
Gate-all-around silicon nanowire MOSFETs and circuits
- Jeffrey W. Sleight
- Sarunya Bangsaruntip
- et al.
- 2010
- DRC 2010
Interface state density measurements in gated p-i-n silicon nanowires as a function of the nanowire diameter
- Guy Cohen
- E. Cartier
- et al.
- 2010
- DRC 2010
Universality of short-channel effects in undoped-body silicon nanowire MOSFETs
- Sarunya Bangsaruntip
- Guy M. Cohen
- et al.
- 2010
- IEEE Electron Device Letters
Fully depleted extremely thin SOI for mainstream 20nm low-power technology and beyond
- Ali Khakifirooz
- Kangguo Cheng
- et al.
- 2010
- ISSCC 2010
Are Si/SiGe tunneling field-effect transistors a good idea?
- Steven J. Koester
- Isaac Lauer
- et al.
- 2010
- ECS Transactions
High performance and highly uniform metal hi-k gate-all-around silicon nanowire mosfets
- Jeffrey W. Sleight
- Sarunya Bangsaruntip
- et al.
- 2010
- ECS Transactions
Impact of lateral asymmetric channel doping on 45-nm-technology N-Type SOI MOSFETs
- Hasan M. Nayfeh
- Nivo Rovedo
- et al.
- 2009
- IEEE Transactions on Electron Devices
High performance and highly uniform gate-all-around silicon nanowire MOSFETs with wire size dependent scaling
- S. Bangsaruntip
- G.M. Cohen
- et al.
- 2009
- IEDM 2009
High performance 32nm SOI CMOS with high-k/metal gate and 0.149μm 2 SRAM and ultra low-k back end with eleven levels of copper
- B. Greene
- Q. Liang
- et al.
- 2009
- VLSI Technology 2009