Partially depleted silicon-on-insulator (SOI): A device design/modeling and circuit perspective
- F. Assaderaghi
- G. Shahidi
- et al.
- 2000
- ICM 2000
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51 results for Jeffrey W. Sleight
Partially-depleted SOI compact model - formulation and parameter extraction
- S.K.H. Fung
- L. Wagner
- et al.
- 2000
- VLSI Technology 2000
0.22 μm CMOS-SOI technology with a Cu BEOL
- A. Ajmera
- J. Sleight
- et al.
- 1999
- VLSI Technology 1999
Investigating surface loss effects in superconducting transmon qubits
- 2017
- IEEE TAS
Precision, double XTEM sample preparation of site specific Si nanowires
- L. Gignac
- S. Mittal
- et al.
- 2009
- Microscopy and Microanalysis
Environmental radiation impact on lifetimes and quasiparticle tunneling rates of fixed-frequency transmon qubits
- R.T. Gordon
- Conal E. Murray
- et al.
- 2022
- Applied Physics Letters
Anisotropic capillary instability of silicon nanostructures under hydrogen anneal
- Tymon Barwicz
- Guy M. Cohen
- et al.
- 2012
- Applied Physics Letters
Multiple double cross-section transmission electron microscope sample preparation of specific sub-10 nm diameter Si nanowire devices
- Lynne M. Gignac
- Surbhi Mittal
- et al.
- 2011
- Microscopy and Microanalysis
Impact of lateral asymmetric channel doping on 45-nm-technology N-Type SOI MOSFETs
- Hasan M. Nayfeh
- Nivo Rovedo
- et al.
- 2009
- IEEE Transactions on Electron Devices
Size-dependent modulation of carrier mobility in top-down fabricated silicon nanowires
- Lidija Sekaric
- Oki Gunawan
- et al.
- 2009
- Applied Physics Letters