Publications

This is our catalog of publications authored by IBM researchers, in collaboration with the global research community. It’s an ever-growing body of work that shows why IBM is one of the most important contributors to modern computing.

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85 results for Pier Andrea Francese

A 10 Gb/s 8-tap 6b 2-PAM/4-PAM tomlinson-harashima precoding transmitter for future memory-link applications in 22-nm SOI CMOS
- - Marcel Kossel
  - Thomas Toifl
  - et al.
- 2013
- IEEE JSSC
A 4×4 MIMO Discrete Multitone Wireline Transceiver With Far-End Crosstalk Cancellation For ADC-Based High-Speed Serial Links
- - Jaewon Lee
  - Seoyoung Jang
  - et al.
- 2024
- ISCAS 2024
A cryogenic SRAM based arbitrary waveform generator in 14 nm for spin qubit control
- - Mridula Prathapan
  - Peter Mueller
  - et al.
- 2022
- ESSCIRC 2022
A system design approach toward integrated cryogenic quantum control systems
- - Mridula Prathapan
  - Peter Mueller
  - et al.
- 2022
- WOLTE 2022
Cryogenic Characterization and Modeling of 14 nm Bulk FinFET Technology
- - Asma Chabane
  - Mridula Prathapan
  - et al.
- 2021
- ESSCIRC 2021
HERMES Core - A 14nm CMOS and PCM-based In-Memory Compute Core using an array of 300ps/LSB Linearized CCO-based ADCs and local digital processing
- - Riduan Khaddam-Aljameh
  - Milos Stanisavljevic
  - et al.
- 2021
- VLSI Circuits 2021
HERMES Core - A 14nm CMOS and PCM-based In-Memory Compute Core using an array of 300ps/LSB Linearized CCO-based ADCs and local digital processing
- - R. Khaddam-Aljameh
  - M. Stanisavljevic
  - et al.
- 2021
- VLSI Technology 2021
A 25-50Gb/s 2.22pJ/b NRZ RX with Dual-Bank and 3-tap Speculative DFE for Microprocessor Application in 7nm FinFET CMOS
- - Yang You
  - Glen Wiedemeier
  - et al.
- 2020
- VLSI Circuits 2020
A 4.8pJ/b 56Gb/s ADC-Based PAM-4 Wireline Receiver Data-Path with Cyclic Prefix in 14nm FinFET
- - Gain Kim
  - Lukas Kull
  - et al.
- 2019
- A-SSCC 2019
A 0.3PJ/Bit 112GB/S PAM4 1+0.5D TX-DFE Precoder and 8-Tap FFE in 14NM CMOS
- - Thomas Toifl
  - Christian Menolfi
  - et al.
- 2018
- VLSI Circuits 2018