Chip-level power-performance optimization through thermally-driven across-chip variation (ACV) reduction
- X. Yu
- Oleg Gluschenkov
- et al.
- 2011
- IEDM 2011
Publications
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53 results for Ken Rim
An anomalous correlation between gate leakage current and threshold voltage fluctuation in advanced MOSFETs
- Zihong Liu
- Paul Chang
- et al.
- 2010
- IEDM 2010
On the difference of temperature dependence of metal gate and poly gate SOI MOSFET threshold voltages
- Shu-Jen Han
- Xinlin Wang
- et al.
- 2008
- IEDM 2008
Improved effective switching current (Ieff+) and capacitance methodology for CMOS circuit performance prediction and model-to-hardware correlation
- Xiaojun Yu
- Shu-Jen Han
- et al.
- 2008
- IEDM 2008
Integration and optimization of embedded-SiGe, compressive and tensile stressed liner films, and stress memorization in advanced SOI CMOS technologies
- M. Horstmann
- A. Wei
- et al.
- 2005
- IEDM 2005
An integrated methodology for accurate extraction of S/D series resistance components in nanoscale MOSFETs
- Seong-Dong Kim
- Shreesh Narasimha
- et al.
- 2005
- IEDM 2005
Design of high performance PFETs with strained Si channel and laser anneal
- Z. Luo
- Y.F. Chong
- et al.
- 2005
- IEDM 2005
High performance 65 nm SOI technology with enhanced transistor strain and advanced-low-K BEOL
- W.-H. Lee
- A. Waite
- et al.
- 2005
- IEDM 2005
Performance comparison and channel length scaling of strained Si FETs on SiGe-on-insulator (SGOI)
- J. Cai
- K. Rim
- et al.
- 2004
- IEDM 2004
Fabrication and Mobility Characteristics of Ultra-thin Strained Si Directly on Insulator (SSDOI) MOSFETs
- K. Rim
- K.K. Chan
- et al.
- 2003
- IEDM 2003