High-performance high-κ/metal gates for 45nm CMOS and beyond with gate-first processing
- M. Chudzik
- B. Doris
- et al.
- 2007
- VLSI Technology 2007
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48 results for Mukesh Khare
Dual layer SrTiO3/HfO2 gate dielectric for aggressively scaled band-edge nMOS devices
- C. Choi
- E. Cartier
- et al.
- 2007
- Microelectronic Engineering
Uniaxial strain relaxation on ultra-thin strained-Si directly on insulator (SSDOI) substrates
- Haizhou Yin
- Z. Ren
- et al.
- 2006
- ICSICT 2006
CMOS fabricated by hybrid-orientation technology (HOT)
- Bin Yang
- M. Yang
- et al.
- 2007
- IEDST 2007
Optimization of silicon technology for the IBM System z9
- Daniel J. Poindexter
- Scott R. Stiffler
- et al.
- 2007
- IBM J. Res. Dev
Challenges and opportunities for high performance 32 nm CMOS technology
- J. Sleight
- I. Lauer
- et al.
- 2006
- IEDM 2006
Direct silicon bonded (DSB) substrate solid phase epitaxy (SPE) integration scheme study for high performance bulk CMOS
- Haizhou Yin
- C.Y. Sung
- et al.
- 2006
- IEDM 2006
High performance 45-nm SOI technology with enhanced strain, porous low-k BEOL, and immersion lithography
- S. Narasimha
- K. Onishi
- et al.
- 2006
- IEDM 2006
Gate-dielectric permitivity and metal-gate work-function tradeoff in Lmet = 25 nm PDSOI device characteristics
- Dechao Guo
- Andres Bryant
- et al.
- 2006
- IEEE Electron Device Letters
Effect of tensile uniaxial stress on the electron transport properties of deeply scaled FD-SOI n-type MOSFETs
- H. Nayfeh
- D. Singh
- et al.
- 2006
- IEEE Electron Device Letters