Enabling Next Generation CMOS by Novel EOT Scaling Module
- Lin Dong
- Steven Hung
- et al.
- 2021
- VLSI Technology 2021
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58 results for B. Haran
Dual Damascene BEOL Extendibility With Cu Reflow / Selective TaN And Co/Cu Composite
- P. Bhosale
- N. Lanzillo
- et al.
- 2021
- VLSI Technology 2021
Challenges and Opportunities for Stacked Transistor: DTCO and Device
- J. Wang
- S.D. Suk
- et al.
- 2021
- VLSI Technology 2021
Parasitic Resistance Reduction for Aggressively Scaled Stacked Nanosheet Transistors
- Su-Chen Fan
- Ruilong Xie
- et al.
- 2020
- IITC 2020
Composite Interconnects for High-Performance Computing beyond the 7nm Node
- P. Bhosale
- S. Parikh
- et al.
- 2020
- VLSI Technology 2020
Structural and Electrical Demonstration of SiGe Cladded Channel for PMOS Stacked Nanosheet Gate-All-Around Devices
- Shogo Mochizuki
- B. Colombeau
- et al.
- 2020
- VLSI Technology 2020
Selective Enablement of Dual Dipoles for near Bandedge Multi-Vt Solution in High Performance FinFET and Nanosheet Technologies
- Ruqiang Bao
- K. Watanabe
- et al.
- 2020
- VLSI Technology 2020
Improved Air Spacer Co-Integrated with Self-Aligned Contact (SAC) and Contact over Active Gate (COAG) for Highly Scaled CMOS Technology
- Kangguo Cheng
- Chanro Park
- et al.
- 2020
- VLSI Technology 2020
Technology challenges and enablers to extend Cu metallization to beyond 7 nm node
- Takeshi Nogami
- H. Huang
- et al.
- 2019
- VLSI Technology 2019
Self-Allancd Gate Contact (SAGC) for CMOS technology scaling beyond 7nm
- Ruilong Xie
- Chanro Park
- et al.
- 2019
- VLSI Technology 2019