Metastability of SOI CMOS latches
- Christophe R. Tretz
- C.T. Chuang
- et al.
- 1999
- International Journal of Electronics
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34 results for Lewis M. Terman
When are transmission-line effects important for on-chip interconnections?
- Alina Deutsch
- Gerard V. Kopcsay
- et al.
- 1997
- IEEE T-MTT
The impact of device scaling limits
- Lewis M. Terman
- 1997
- Applied Surface Science
A Variable Precharge Voltage Sensing
- Toshiaki Kirihata
- Sang H. Dhong
- et al.
- 1995
- IEEE Journal of Solid-State Circuits
A 20-ns 128-Kbit X 4 High-Speed DRAM with 330-Mbit/s Data Rate
- Nicky C.C. Lu
- Hu H. Chao
- et al.
- 1988
- IEEE Journal of Solid-State Circuits
A Substrate-Plate Trench-Capacitor (SPT) Memory Cell for Dynamic RAM's
- Nicky Chau-Chun Lu
- Tak H. Ning
- et al.
- 1986
- IEEE Journal of Solid-State Circuits
A Self-Aligned 1-μm-Channel CMOS Technology with Retrograde n-Well and Thin Epitaxy
- Yuan Taur
- Genda J. Hu
- et al.
- 1985
- IEEE T-ED
A Self-Aligned 1-μm-Channel CMOS Technology with Retrograde n-Well and Thin Epitaxy
- Yuan Taur
- Genda J. Hu
- et al.
- 1985
- IEEE Journal of Solid-State Circuits
CCD Memory Using Multilevel Storage
- Michael B. Pettigrew
- Lawrence G. Heller
- et al.
- 1981
- IEEE Journal of Solid-State Circuits
The Effect of Alpha-Particle-Induced Soft Errors on Memory Systems with Error Correction
- Date J. W. Noorlag
- Lewis M. Terman
- et al.
- 1980
- IEEE Journal of Solid-State Circuits