A Self-Aligned 1-μm-Channel CMOS Technology with Retrograde n-Well and Thin Epitaxy
- Yuan Taur
- Genda J. Hu
- et al.
- 1985
- IEEE Journal of Solid-State Circuits
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Performance Limits of CMOS ULSI
- James R. Pfiester
- John D. Shott
- et al.
- 1985
- IEEE Journal of Solid-State Circuits
Stability and SER Analysis of Static RAM Cells
- Barbara Chappell
- Stanley E. Schuster
- et al.
- 1985
- IEEE Journal of Solid-State Circuits
Nonuniform Displacement of MOSFET Channel Pinchoff
- Savvas G. Chamberlain
- Asim Husain
- et al.
- 1984
- IEEE Journal of Solid-State Circuits
Half-VDD Bit-Line Sensing Scheme in CMOS DRAM's
- Nicky Chau-Chun Lu
- Hu H. Chao
- 1984
- IEEE Journal of Solid-State Circuits
A 20 ns 64K (4K X16) NMOS RAM
- Stanley E. Schuster
- Barbara Chappell
- et al.
- 1984
- IEEE Journal of Solid-State Circuits
1.25 μm Deep-Groove-lsolated Self-Aligned Bipolar Circuits
- Denny D. Tang
- Paul M. Solomon
- et al.
- 1982
- IEEE Journal of Solid-State Circuits
Alpha-Particle-Induced Soft Error Rate in VLSI Circuits
- George A. Sai-Halasz
- Matthew R. Wordeman
- et al.
- 1982
- IEEE Journal of Solid-State Circuits
MAIL-A New Josephson Logic Family
- Hansjörg Beha
- 1982
- IEEE Journal of Solid-State Circuits
The Wire-Limited Logic Chip
- Robert W. Keyes
- 1982
- IEEE Journal of Solid-State Circuits