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Epi Source-Drain Damage Mitigation During Channel Release of Stacked Nanosheet Gate-All-Around TransistorsCurtis DurfeeIvo Ottoet al.2023ECS Meeting 2023
Epi Source/Drain Damage Mitigation with Inner Spacer and Buffer Optimization in Stacked Nanosheet Gate-All-Around TransistorsCurtis DurfeeIvo Ottoet al.2023SSDM 2023
Advanced BEOL Materials, Processes, and Integration to Reduce Line Resistance of Damascene Cu, Co, and Subtractive Ru InterconnectsTakeshi NogamiOleg Gluschenkovet al.2022VLSI Technology and Circuits 2022
Etch and Patterning Development for 2nm Node Nanosheet DevicesEric MillerIndira Seshadriet al.2022SPIE Advanced Lithography 2022
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EUV single exposure via patterning at aggressive pitchJing GuoJennifer Churchet al.2021SPIE Advanced Lithography 2021
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MBMary BretonTechnical Assistant to Huiming Bu | Semiconductor Enablement Program Management & Infrastructure