Veeresh Deshpande, Herwig Hahn, et al.
VLSI Technology 2017
We report CMOS-compatible n-channel InGaAs-on-insulator FinFETs obtained using a replacement metal gate fabrication flow. The fabricated devices feature 12-nm-thick SiNx spacers, a scaled high-k/metal gate (capacitance equivalent thickness of ∼ 1.5nm), raised source and drain doped to ∼ 6× 1019/cm3, and fin width scaled down to 15 nm. Very good control of short-channel effects is demonstrated down to a gate length of 50 nm with a minimum subthreshold swing of 92 mV/decade at VDS=0.5V and a drain-induced barrier lowering of 57 mV/V. An ON-state current (ION) of 156μA/μm is also reported for a supply voltage of 0.5 V and a fixed OFF-state current of 100 nA/μm. This ION value is the highest reported to date for CMOS-compatible InGaAs devices integrated on Si.
Veeresh Deshpande, Herwig Hahn, et al.
VLSI Technology 2017
Preksha Tiwari, Anna Fischer, et al.
CLEO/Europe-EQEC 2021
Daniele Caimi, Preksha Tiwari, et al.
IEEE T-ED
Veeresh Deshpande, V. Djara, et al.
IEDM 2015