Dechao Guo, G. Karve, et al.
VLSI Technology 2016
We report partially depleted silicon-on-insulator p-channel field-effect transistors fabricated with a 32-nm-technology ground rule and featuring SiGe raised source/drain, SiGe channel, and implant-free extension formation process. A respectable drive current of 950 μAm is obtained at an off current of 100 nAμm, VDD = 1V, and a contacted gate pitch of 130 nm. Furthermore, when the transistor width is scaled down to 100 nm, the saturation transconductance increases by about 15%, leading to a drive current of 1100 μAm. © 2006 IEEE.
Dechao Guo, G. Karve, et al.
VLSI Technology 2016
Jin Cai, Tak Ning, et al.
IEEE International SOI Conference 2008
Tianbing Chen, Akil K. Sutton, et al.
IEEE TNS
Tak H. Ning, Jin Cai
IEEE J-EDS