S. Narasimha, P. Chang, et al.
IEDM 2012
With single wafer cleaning becoming a mature part of advanced semiconductor manufacturing, it seemed appropriate to reflect on a period of rapid and dramatic change within the gate module. Specifically, there are 6 key learnings that have enabled our team to take embedded contamination from top of the yield pareto to a more baseline level of defectivity. Those key learnings were: 1) Particle removal efficiency is critical. 2) DI Prewet improves pattern fidelity. 3) S/P ratio drives dual gate chemical oxide growth. 4) Hydrophobic dewetting can occur. 5) Predispense sequences are critical. 6) Concentration differences between batch and single wafer tooling can drive significant effects. © 2013 IEEE.
S. Narasimha, P. Chang, et al.
IEDM 2012
Wei-Tsu Tseng, Vamsi Devarapalli, et al.
ASMC 2013
Oliver D. Patterson, Deborah A. Ryan, et al.
ASMC 2013
C. Pei, G. Wang, et al.
IEDM 2014