12.8-ps/l.O-mW Charge-Buffered Active-Pull-Down NTL Circuit
- Kenneth Chin
- Ching-Te Chuang
- et al.
- 1992
- IEEE Journal of Solid-State Circuits
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19 results for Ken Chin
On the Leverage of High-fT Transistors for Advanced High-Speed Bipolar Circuits
- C.T. Chuang
- Ken Chin
- et al.
- 1992
- IEEE Journal of Solid-State Circuits
14.9 ps/2.2 mW charge-buffered active-pull-down ECL circuit
- Ken Chin
- C.T. Chuang
- et al.
- 1992
- Electronics Letters
High-Speed Low-Power ECL Circuit with AC-Coupled Self-Biased Dynamic Current Source and Active-Pull-Down Emitter-Follower Stage
- C.T. Chuang
- Ken Chin
- et al.
- 1992
- IEEE Journal of Solid-State Circuits
High-Speed Low-Power Charge-Buffered Active-Pull-Down ECL Circuit
- C.T. Chuang
- Ken Chin
- 1991
- IEEE Journal of Solid-State Circuits
A 1.9 ns/6.3 W/256 Kb bipolar SRAM design
- Kai-Yap Toh
- C.T. Chuang
- et al.
- 1990
- Bipolar Circuits and Technology Meeting 1990
High-speed low-power charge-buffered active-pull-down ECL circuit
- C.T. Chuang
- Ken Chin
- 1990
- Bipolar Circuits and Technology Meeting 1990
23 ps/2.1 mW ECL gate
- Kai-Yap Toh
- C.T. Chuang
- et al.
- 1989
- ISSCC 1989
Sub-300-ps CBL Circuits
- S.K. Wiedmann
- Tze Chiang Chen
- et al.
- 1989
- IEEE Electron Device Letters