H.-S. Wong, D.J. Frank, et al.
IEDM 1994
This brief presents a detailed study on the leverage of high-fT transistors for advanced high-speed bipolar circuit applications. It is shown that for the standard ECL circuit, the leverage of high fT is limited by the passive resistors (emitterfollower resistor and collector load resistor) and wire delay, especially in the low-power regime. For the standard NTL circuit, the leverage is higher due to its front-end configuration and lower power supply value. As the passive resistors are decoupled from the delay path in various advanced circuits utilizing active-pull-down schemes, the leverage of high fTbecomes more significant. © 1992 IEEE
H.-S. Wong, D.J. Frank, et al.
IEDM 1994
R. Puri, C.T. Chuang
VLSID 2000
Kai-Yap Toh, C.T. Chuang, et al.
Bipolar Circuits and Technology Meeting 1990
R. Rodríguez, J.H. Stathis, et al.
Microelectronics Reliability