On-chip wiring design challenges for gigahertz operation operation
- Alina Deutsch
- Paul W. Coteus
- et al.
- 2001
- Proceedings of the IEEE
Publications
Date
Featured collections
Popular topics
66 results for Phillip Restle
Clock tree and power grid design > 1 GHz
- Phillip J. Restle
- Albert Ruehli
- et al.
- 2000
- ADMETA 2000
Dealing with inductance in high-speed chip design
- P. Restle
- A.E. Ruehli
- et al.
- 1999
- DAC 1999
Designing the best clock distribution network
- P. Restle
- A. Deutsch
- 1998
- VLSI Circuits 1998
Measurement and modeling of on-chip transmission line effects in a 400 MHz microprocessor
- P. Restle
- Keith A. Jenkins
- et al.
- 1998
- IEEE Journal of Solid-State Circuits
When are transmission-line effects important for on-chip interconnections?
- Alina Deutsch
- Gerard V. Kopcsay
- et al.
- 1997
- IEEE T-MTT
Importance of inductance and inductive coupling for on-chip wiring
- A. Deutsch
- H. Smith
- et al.
- 1997
- IEEE Topical Meeting EPEPS 1997
A 400-MHz S/390 microprocessor
- Charles F. Webb
- Carl J. Anderson
- et al.
- 1997
- IEEE Journal of Solid-State Circuits
When are transmission-line effects important for on-chip interconnections
- A. Deutsch
- G.V. Kopcsay
- et al.
- 1997
- ECTC 1997
Design guidelines for short, medium, and long on-chip interconnections
- A. Deutsch
- W.D. Becker
- et al.
- 1996
- IEEE Topical Meeting EPEPS 1996