Publications

This is our catalog of publications authored by IBM researchers, in collaboration with the global research community. It’s an ever-growing body of work that shows why IBM is one of the most important contributors to modern computing.

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85 results for Pier Andrea Francese

A 50GB/S 1.6PJ/B RX Data-Path with Quarter-Rate 3-Tap Speculative DFE
- - Pier Andrea Francese
  - Alessandro Cevrero
  - et al.
- 2018
- VLSI Circuits 2018
A 10-Bit 20-40 GS/S ADC with 37 dB SNDR at 40 GHz Input Using First Order Sampling Bandwidth Calibration
- - Lukas Kull
  - Danny Luu
  - et al.
- 2018
- VLSI Circuits 2018
Parallel Implementation Technique of Digital Equalizer for Ultra-High-Speed Wireline Receiver
- - Gain Kim
  - Lukas Kull
  - et al.
- 2018
- ISCAS 2018
DDR4 transmitter with ac-boost equalization and wide-band voltage regulators for thin-oxide protection in 14-nm SOI CMOS Technology
- - Marcel Kossel
  - Christian Menolfi
  - et al.
- 2017
- ESSCIRC 2017
Background calibration using noisy reference ADC for a 12b 600MS/s 2×TI SAR ADC in 14nm CMOS FinFET
- - Danny Luu
  - Lukas Kull
  - et al.
- 2017
- ESSCIRC 2017
A 60 Gb/s 1.9 pJ/bit NRZ optical-receiver with low latency digital CDR in 14nm CMOS FinFET
- - Alessandro Cevrero
  - Ilter Ozkaya
  - et al.
- 2017
- VLSI Circuits 2017
A 5Gb/s 7.1fJ/b/mm 8× multi-drop on-chip 10mm data link in 14nm FinFET CMOS SOI at 0.5V
- - Elisa Sacco
  - Pier Andrea Francese
  - et al.
- 2017
- VLSI Circuits 2017
A 12b 61dB SNDR 300MS/s SAR ADC with inverter-based preamplifier and common-mode-regulation DAC in 14nm CMOS FinFET
- - Danny Luu
  - Lukas Kull
  - et al.
- 2017
- VLSI Circuits 2017
Encoder logic for reducing serial I/O power in sensors and sensor hubs
- - Phillip Stanley-Marbell
  - Pier Andrea Francese
  - et al.
- 2016
- HCS 2016
CMOS ADCs Towards 100 GS/s and beyond
- - Lukas Kull
  - Danny Luu
  - et al.
- 2016
- CSICS 2016