Partially-depleted SOI compact model - formulation and parameter extraction
- S.K.H. Fung
- L. Wagner
- et al.
- 2000
- VLSI Technology 2000
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42 results for L. Wagner
0.22 μm CMOS-SOI technology with a Cu BEOL
- A. Ajmera
- J. Sleight
- et al.
- 1999
- VLSI Technology 1999
Device and circuit design issues in SOI technology
- G. Shahidi
- A. Ajmera
- et al.
- 1999
- CICC 1999
0.25 μm CMOS SOI technology and its application to 4 Mb SRAM
- D. Schepis
- F. Assaderaghi
- et al.
- 1997
- IEDM 1997
7.9/5.5 psec room/low temperature SOI CMOS
- F. Assaderaghi
- W. Rausch
- et al.
- 1997
- IEDM 1997
Floating-body effects in partially depleted SOI CMOS circuits
- Pong-Fei Lu
- Ching-Te Chuang
- et al.
- 1997
- IEEE Journal of Solid-State Circuits
Dual-mode parasitic bipolar effect in dynamic CVSL XOR circuit with floating-body partially-depleted SOI devices
- C.T. Chuang
- P.F. Lu
- et al.
- 1997
- VLSI-TSA 1997
Transient pass-transistor leakage current in SOI MOSFET's
- F. Assaderaghi
- G. Shahidi
- et al.
- 1997
- IEEE Electron Device Letters
Floating body effects in partially-depleted SOI CMOS circuits
- P.F. Lu
- J. Ji
- et al.
- 1996
- LPED 1996
Accurate measurement of pass-transistor leakage current in SOI MOSFETs
- F. Assaderaghi
- G. Shahidi
- et al.
- 1996
- IEEE International SOI Conference 1996