High speed serializing/de-serializing design-for-test method for evaluating a 1 GHz microprocessor
- D. Heidel
- S. Dhong
- et al.
- 1998
- VTS 1998
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55 results for David F. Heidel
Design and implementation of high performance dynamic 64-bit parallel adder with enhanced testability
- W. Hwang
- G.D. Gristede
- et al.
- 1998
- CICC 1998
Low temperature 12 ns DRAM
- W.H. Henkels
- N.C.-C. Lu
- et al.
- 1989
- VLSI-TSA 1989
Low temperature SER and noise in a high speed DRAM
- W.H. Henkels
- N.C.-C. Lu
- et al.
- 1989
- Workshop on Low Temperature Semiconductor Electronics 1989
Experimental low temperature DRAM
- W.H. Henkels
- N.C.-C. Lu
- et al.
- 1989
- VLSI Circuits 1989
A high performance liquid-nitrogen CMOS SRAM technology
- J.Y.-C. Sun
- S. Klepner
- et al.
- 1988
- ESSDERC 1988
Hardness assurance testing for proton direct ionization effects
- James R. Schwank
- Marty R. Shaneyfelt
- et al.
- 2012
- IEEE TNS
32 and 45 nm radiation-hardened-by-design (RHBD) SOI latches
- Kenneth P. Rodbell
- David F. Heidel
- et al.
- 2011
- IEEE TNS
Comparison of single and two-photon absorption for laser characterization of single-event upsets in SOI SRAMs
- James R. Schwank
- Marty R. Shaneyfelt
- et al.
- 2011
- IEEE TNS
Electron beam testing of circuits at liquid nitrogen temperature
- Keith A. Jenkins
- M.J. Immediato
- et al.
- 2011
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