Isaac Lauer, Nicolas Loubet, et al.
VLSI Technology 2015
As technology nodes go down to 32nm and beyond, the requirements for CMP thickness, uniformity and defects get extremely high. Thickness variation can cause etch issues, uniformity can cause litho problem, and even small size defects will cause contact open and short issues. In this paper, we present the process improvement for contact oxide CMP thickness, uniformity and defects through the selection of pad and slurry, optimization of process parameters and optimization of endpoint recipe algorithm. Results from both monitor wafers and production wafers are presented and discussed.
Isaac Lauer, Nicolas Loubet, et al.
VLSI Technology 2015
John H. Zhang, Wei-Tsu Tseng, et al.
MRS Spring Meeting 2012
Michael Ignatowski
VMIC 2008
Puneet Goyal, Sneha Gupta, et al.
IEEE International SOI Conference 2010