Investigations of silicon nano-crystal floating gate memories
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
The authors demonstrate pattern transfer of 29-nm-pitch self-assembled line-space polystyrene-poly(methyl methacrylate) patterns generated by graphoepitaxy into three important materials for semiconductor device integration: silicon, silicon nitride, and silicon oxide. High fidelity plasma etch transfer with production-style reactors was achieved through co-optimization of multilayer masking film stacks and reactor conditions. The authors present a systematic study of the line edge roughness (LER) and line width roughness evolution during pattern transfer. Application of a postetch annealing process shows reduction of the LER of silicon features from around ∼3 nm to less than 1.5 nm. These results further demonstrate that directed self-assembly-based patterning may be a suitable technique for semiconductor device manufacturing. © 2012 American Vacuum Society.
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
Corneliu Constantinescu
SPIE Optical Engineering + Applications 2009
Kafai Lai, Alan E. Rosenbluth, et al.
SPIE Advanced Lithography 2007
K.A. Chao
Physical Review B