A 16Gb/s 3.7mW/Gb/s 8-tap DFE receiver and baud rate CDR with 30kppm tracking bandwidth
- Pier Andrea Francese
- Thomas Toifl
- et al.
- 2013
- A-SSCC 2013
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87 results for Pier Andrea Francese
A 35mW8 b 8.8 GS/s SAR ADC with low-power capacitive reference buffers in 32nm Digital SOI CMOS
- Lukas Kull
- Thomas Toifl
- et al.
- 2013
- VLSI Circuits 2013
A 4.6W/mm2 power density 86% efficiency on-chip switched capacitor DC-DC converter in 32 nm SOI CMOS
- Toke M. Andersen
- Florian Krismer
- et al.
- 2013
- APEC 2013
Room-temperature THz imaging based on antenna-coupled MOSFET bolometer
- Thomas Morf
- Bernhard Klein
- et al.
- 2013
- MEMS 2013
A 3.1mW/Gbps 30Gbps quarter-rate triple-speculation 15-tap SC-DFE RX data path in 32nm CMOS
- Thomas Toifl
- Michael Ruegg
- et al.
- 2012
- VLSI Circuits 2012
A 2.6mW/Gbps 12.5Gbps RX with 8-tap switched-cap DFE in 32nm CMOS
- Thomas Toifl
- Christian Menolfi
- et al.
- 2011
- VLSI Circuits 2011
Digital-to-Analog Converters for 100+ Gb/s Wireline Transmitters: Architectures, Circuits, and Calibration
- Tod Dickson
- Zeynep Toprak Deniz
- et al.
- 2024
- CICC 2024
A 40 GS/s 8b-DAC SST-TX in 7 nm FinFET CMOS for cryogenic quantum applications with 32kB SRAM-based RF-DDS AWG
- 2024
- ESSERC 2024
A Loop-Break Decision Feedback Equalizer for DAC/ADC-DSP-based Wireline Transceivers
- Donggeon Kim
- Yujin Choi
- et al.
- 2024
- IEEE TCAS-I
Experimental efficiency evaluation of stacked transistor half-bridge topologies in 14 nm cmos technology
- Pedro André Martins Bezerra
- Florian Krismer
- et al.
- 2021
- Electronics (Switzerland)