Towards Scalable 3D Integration of 2T-nC FeRAM with Hundreds of Layer Stacking
- Jiahui Duan
- Shan Deng
- et al.
- 2025
- IEDM 2025
Publications
20 results for Design and Enablement
Block-Level Design Optimization for Sub-100-nm Cell Height Libraries with Stacked Transistor
- Nick Lanzillo
- Jim Mazza
- et al.
- 2025
- IEDM 2025
The ShareLM Collection and Plugin: Contributing Human-Model Chats for the Benefit of the Community
- Shachar Don-Yehiya
- Leshem Choshen
- et al.
- 2025
- ACL 2025
The Cloud, Like Building and Running Go Binaries
- Diana Arroyo
- Paul Castro
- et al.
- 2025
- ICDCS 2025
A 6+ Ghz 128Kb Multi-Port L1 Cache Using Ground Rule Clean 10T Bitcells in 5Nm Technology
- Rajiv Joshi
- John Davis
- et al.
- 2025
- VLSI Technology and Circuits 2025
Fast and Accurate Machine Learning Prediction of Back-End-of-Line Thermal Resistances in Backside Power Delivery and Chiplet Architectures
- Prabudhya Roy Chowdhury
- Aakrati Jain
- et al.
- 2025
- ECTC 2025
A Multiscale Workflow for Thermal Analysis of 3DI Chip Stacks
- Max Bloomfield
- Amogh Wasti
- et al.
- 2025
- ITherm 2025
Diagnosing and Prioritizing Issues in Automated Order-Taking Systems: A Machine-Assisted Error Discovery Approach
- Maeda F Hanafi
- Frederick Reiss
- et al.
- 2025
- CHI 2025
Dose reduction strategies for low-n PSM absorber using pupil and mask bias optimization at 0.33NA EUV lithography
- Rajiv Sejpal
- Gopal Kenath
- et al.
- 2025
- Photomask Japan 2025
Multi-reticle stitching: Applications from packaging to High-NA EUV
- Chris Bottoms
- Rick Johnson
- et al.
- 2025
- SPIE Advanced Lithography + Patterning 2025