Jonghae Kim, Jean-Olivier Plouchart, et al.
RFIC 2003
A bulk silicon divide-by-two dynamic frequency divider with maximum clock speed of 26.5 GHz has been achieved. The dynamic divider operates from 6.5 GHz to 26.5 GHz. The design is based on n-channel MOSFET's with an effective gate length of 0.1 µm. © 2000, The Institute of Electrical and Electronics Engineers, Inc. All rights reserved.
Jonghae Kim, Jean-Olivier Plouchart, et al.
RFIC 2003
Shu-Jen Han, Keith A. Jenkins, et al.
Nano Letters
Joachim N. Burghartz, Daniel C. Edelstein, et al.
IEEE T-MTT
Yu-Ming Lin, Hsin-Ying Chiu, et al.
IEEE Electron Device Letters