Yu-Ming Lin, Alberto Valdes-Garcia, et al.
Science
A bulk silicon divide-by-two dynamic frequency divider with maximum clock speed of 26.5 GHz has been achieved. The dynamic divider operates from 6.5 GHz to 26.5 GHz. The design is based on n-channel MOSFET's with an effective gate length of 0.1 µm. © 2000, The Institute of Electrical and Electronics Engineers, Inc. All rights reserved.
Yu-Ming Lin, Alberto Valdes-Garcia, et al.
Science
Mario M. Pelella, Jerry G. Fossum, et al.
IEEE Electron Device Letters
Keith A. Jenkins
IEEE Trans. Instrum. Meas.
Pong-Fei Lu, Keith A. Jenkins, et al.
IRPS 2015