Steven J. Koester, Albert M. Young, et al.
IBM J. Res. Dev
Paper
A 26.5 GHz Silicon MOSFET 2:1 Dynamic Frequency Divider
Abstract
A bulk silicon divide-by-two dynamic frequency divider with maximum clock speed of 26.5 GHz has been achieved. The dynamic divider operates from 6.5 GHz to 26.5 GHz. The design is based on n-channel MOSFET's with an effective gate length of 0.1 µm. © 2000, The Institute of Electrical and Electronics Engineers, Inc. All rights reserved.
Related
Jean-Olivier Plouchart, Noah Zamdmer, et al.
IBM J. Res. Dev
Keith A. Jenkins, Eduard Cartier, et al.
IEEE Electron Device Letters
Conference paper
On-chip spectrum analyzer for analog built-in self test
Anup P. Jose, Keith A. Jenkins, et al.
VTS 2005