20 nm N + abrupt junction formation in Strained Si/Si 1-xGe x MOS device
- K.L. Lee
- F. Cardone
- et al.
- 2003
- IEDM 2003
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15 results for Kam-Leung Lee
Sub-30 nm P+ abrupt junction formation in strained Si/Si1-xGex MOS device
- K.L. Lee
- J.O. Chu
- et al.
- 2002
- IEDM 2002
Metal-gate FinFET and fully-depleted SOI devices using total gate silicidation
- Jakub Kedzierski
- Edward Nowak
- et al.
- 2002
- IEDM 2002
Very high performance 50 nm CMOS at low temperature
- S.J. Wind
- L.T. Shi
- et al.
- 1999
- IEDM 1999
Sharp reduction of contact resistivities by effective schottky barrier lowering with silicides as diffusion sources
- Zhen Zhang
- F. Pagette
- et al.
- 2010
- IEEE Electron Device Letters
High-κ/metal-gate fully depleted SOI CMOS with single-silicide schottky source/drain with sub-30-nm gate length
- Marwan H. Khater
- Zhen Zhang
- et al.
- 2010
- IEEE Electron Device Letters
Self-Aligned n-Channel Germanium MOSFETs With a Thin Ge Oxynitride Gate Dielectric and Tungsten Gate
- Hulling Shang
- Kam-Leung Lee
- et al.
- 2004
- IEEE Electron Device Letters
Sub-30 nm abrupt P+ junction formation with Ge preamorphization and high energy Si co-implantation
- K.L. Lee
- Ted Zabel
- et al.
- 1999
- MRS Spring Meeting 1999
Sub-25nm FinFET with advanced fin formation and short channel effect engineering
- Tenko Yamashita
- Veeraraghvan S. Basker
- et al.
- 2011
- VLSI Technology 2011
Effective schottky barrier lowering for contact resistivity reduction using silicides as diffusion sources
- Zhen Zhang
- F. Pagette
- et al.
- 2010
- VLSI-TSA 2010