Optimization of 3nm High Performance Nanosheet Technology for 77 K Operation
- Julien Frougier
- Ruqiang Bao
- et al.
- 2025
- GOMACTech 2025
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17 results for Logic Scaling
Evaluating Novel Material Stacks Towards Gate Width Roughness Reduction
- Gopal Kenath
- Martin Burkhardt
- et al.
- 2025
- SPIE Advanced Lithography + Patterning 2025
- Topic
Accelerating High NA EUV Lithography Insertion for Interconnect Scaling and Beyond: Performance, Cost, and Future Prospects
- Luciana Meli
- Indira Seshadri
- et al.
- 2025
- SPIE Advanced Lithography + Patterning 2025
Dry Resist Characterization Towards Technology Insertion for 28-36P EUV Patterning
- Yasiel Cabrera
- Gopal Kenath
- et al.
- 2025
- SPIE Advanced Lithography + Patterning 2025
The Viability of HFO-1234ze(E) (trans-1,3,3,3-Tetrafluoropropene) as a Low Global Warming Potential Silicon Dioxide Etch Gas
- Aaron Windsor
- Jeremy Clark
- et al.
- 2025
- JVSTB
Advanced Multi-Vt Enabled by Selective Layer Reductions for 2nm Nanosheet Technology and Beyond
- Ruqiang Bao
- Yusuke Oniki
- et al.
- 2024
- IEDM 2024
Small Signal Capacitance in Ferroelectric HZO: Mechanisms and Physical Insights
- Revanth Kodoru
- Atanu Saha
- et al.
- 2024
- arXiv
DTCO Guided Process Integration: Case Studies From FEOL & BEOL with BSPDN
- Minhaz Abedin
- Shahrukh Khan
- et al.
- 2024
- ASMC 2024
Topological semimetal interface resistivity scaling for vertical interconnect applications
- Nicholas A. Lanzillo
- Utkarsh Bajpai
- et al.
- 2024
- Applied Physics Letters
New approach of local critical dimension uniformity improvement for via/contact hole etch with direct current superposition
- Emilia W. Hirsch
- Dominik Metzler
- et al.
- 2024
- JVSTB