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PaperFinFET external resistance analysis by extended shift-and-ratio methodChen Zhang, Zuoguang Liu, et al.IEEE T-ED
Conference paperIntegrated dual SPE processes with low contact resistivity for future CMOS technologiesHeng Wu, Soon-Cheon Seo, et al.IEDM 2017
Conference paperA 7nm FinFET technology featuring EUV patterning and dual strained high mobility channelsRuilong Xie, Pietro Montanini, et al.IEDM 2016
