J.H. Stathis, R. Bolam, et al.
INFOS 2005
A cost effective 28 nm CMOS Interconnect technology is presented for 28 nm node high performance and low power applications. Full entitlement of ultra low-k (ULK) inter-level dielectric is enabled. Copper wiring levels can be combined up to a total of 11 levels. The inter-level dielectric was optimized for low k-value and high strength. The feature profiles were optimized to enable defect-free metallization using conventional tools and processes. High yields and robust reliability were demonstrated. © 2011 Elsevier B.V. All rights reserved.
J.H. Stathis, R. Bolam, et al.
INFOS 2005
G. Will, N. Masciocchi, et al.
Zeitschrift fur Kristallographie - New Crystal Structures
A. Nagarajan, S. Mukherjee, et al.
Journal of Applied Mechanics, Transactions ASME
Elizabeth A. Sholler, Frederick M. Meyer, et al.
SPIE AeroSense 1997